(module "IUT-CP4_35x51mm" (layer F.Cu)
  (tedit 4B90D572)
  (descr "Capacitor, pol, cyl 35x51mm")
  (fp_text reference "CP_35x51mm" (at 0.0000 -1.2700) (layer F.SilkS) (effects (font (size 1.5240 1.5240) (thickness 0.3048))))
  (fp_text value "C**" (at 0.0000 1.2700) (layer F.SilkS) (effects (font (size 1.0160 1.0160) (thickness 0.1524))))
  (fp_line (start 6.3500 -16.2560) (end -6.3500 -16.2560) (layer F.SilkS) (width 0.2540))
  (fp_line (start -6.3500 -16.2560) (end -5.3340 -16.5100) (layer F.SilkS) (width 0.2540))
  (fp_line (start -5.3340 -16.5100) (end 5.8420 -16.5100) (layer F.SilkS) (width 0.2540))
  (fp_line (start 5.8420 -16.5100) (end 4.8260 -16.7640) (layer F.SilkS) (width 0.2540))
  (fp_line (start 4.8260 -16.7640) (end -4.8260 -16.7640) (layer F.SilkS) (width 0.2540))
  (fp_line (start -4.8260 -16.7640) (end -5.0800 -16.5100) (layer F.SilkS) (width 0.2540))
  (fp_line (start -5.0800 -16.5100) (end -3.8100 -17.0180) (layer F.SilkS) (width 0.2540))
  (fp_line (start -3.8100 -17.0180) (end 3.5560 -17.0180) (layer F.SilkS) (width 0.2540))
  (fp_line (start 3.5560 -17.0180) (end 4.3180 -16.7640) (layer F.SilkS) (width 0.2540))
  (fp_line (start 4.3180 -16.7640) (end 2.7940 -17.2720) (layer F.SilkS) (width 0.2540))
  (fp_line (start 2.7940 -17.2720) (end -2.2860 -17.2720) (layer F.SilkS) (width 0.2540))
  (fp_line (start -2.2860 -17.2720) (end -3.0480 -17.0180) (layer F.SilkS) (width 0.2540))
  (fp_circle (center 0.0000 0.0000) (end 17.5260 0.5080) (layer F.SilkS) (width 0.2540))
  (fp_line (start 3.1750 -15.3670) (end 4.0640 -15.3670) (layer F.SilkS) (width 0.2540))
  (pad "1" thru_hole rect (at 0.0000 5.0800) (size 2.9997 2.9997) (drill 1.5011 (offset 0.0000 0.0000)) (layers *.Mask B.Cu F.SilkS))
  (pad "2" thru_hole circle (at 0.0000 -5.0800) (size 2.9997 2.9997) (drill 1.5011 (offset 0.0000 0.0000)) (layers *.Mask B.Cu F.SilkS))
  (model "discret/capacitor/cp_35x51mm.wrl" (at (xyz 0.0000 0.0000 0.0000)) (scale (xyz 1.0000 1.0000 1.0000)) (rotate (xyz 0.0000 0.0000 0.0000)))
)